When comparing modern graphics cards in our Real-World FPS Calculator or configuring a balanced rig in the Custom Gaming PC Builder, raw shader TFLOPS only tell half the story. In rasterized 1080p esports titles, shader cores rarely wait long for data. Once you step up to 1440p Ultrawide or native 4K (`3840 × 2160`) with Deferred Rendering G-Buffers, Ray-Traced Bounding Volume Hierarchies (BVH), and Frame Generation optical-flow buffers, the primary bottleneck shifts from compute units to memory subsystem bandwidth.
Over the past two hardware generations, GPU architects tried to compensate for narrower 128-bit and 192-bit memory buses by inflating on-die L2 cache from 4MB up to 64MB–96MB. Now, with the arrival of GDDR7 memory utilizing PAM3 (Pulse Amplitude Modulation 3-Level) signaling, physical memory bandwidth has surged past 896 GB/s on mid-high cards and 1,792 GB/s on 512-bit flagship silicon.
Title: GDDR6 vs. GDDR6X vs. GDDR7 Architectural Telemetry
Badge: Silicon Engineering
- GDDR6 (NRZ Binary Signaling): 18–20 Gbps per pin; 192-bit bus yields 432–480 GB/s; 256-bit bus yields 576–640 GB/s.
- GDDR6X (PAM4 4-Level Signaling): 21–24 Gbps per pin; higher thermal dissipation and signal-to-noise complexity.
- GDDR7 (PAM3 3-Level Signaling): 28–32 Gbps per pin (transmits 3 bits per 2 cycles); 256-bit bus delivers 896–1,024 GB/s while improving energy efficiency by ~20% over GDDR6X.
- L2 Cache Miss Penalty: On-die L2 cache works brilliantly at 1080p/1440p, but 4K G-buffers + BVH ray traversal exceed 64MB working sets, forcing frequent off-chip VRAM fetches where bus width rules supreme.
Why PAM3 Signaling in GDDR7 Beat PAM4
Traditional GDDR6 used Non-Return-to-Zero (NRZ / PAM2) signaling, which transmits a single bit (`0` or `1`) per clock cycle using two voltage levels. To push past 20 Gbps without doubling clock frequencies, GDDR6X adopted PAM4 (four voltage levels transmitting 2 bits per cycle). However, dividing the voltage swing into four tight steps reduced the eye-diagram height to one-third of NRZ, requiring power-hungry error correction and generating substantial heat on the GPU memory controller.
GDDR7 solves this engineering trade-off with PAM3 (three voltage levels: `-1`, `0`, `+1`). PAM3 encodes 3 bits across every 2 clock cycles (`1.58 bits per cycle`), achieving 28 Gbps to 32 Gbps per pin with a significantly cleaner signal-to-noise ratio and lowerPHY controller wattage than PAM4.
When L2 Cache Stops Saving a Narrow 128-bit or 192-bit Bus
In a traditional deferred renderer—such as Cyberpunk 2077: Phantom Liberty, Alan Wake 2, or S.T.A.L.K.E.R. 2: Heart of Chornobyl—every pixel on screen writes multiple render targets (Albedo, Normal, Roughness/Metallic, Motion Vectors, Depth) into the G-Buffer:
1. At 1080p (`2.07 million pixels`): The active frame-buffer tile and temporal history fit comfortably inside a 32MB to 64MB L2 cache, yielding a 70%+ cache hit rate. Even a 128-bit bus performs respectably.
2. At 4K (`8.29 million pixels` — 4x the pixel footprint): The uncompressed G-Buffer, shadow maps, and temporal upscaling history buffers balloon past 110MB per frame. Worse yet, Path Tracing launches incoherent secondary bounce rays that scatter across random geometry chunks in VRAM, dropping L2 cache hit rates below 35%.
Whenever an L2 cache miss occurs, the shader core stalls waiting for the physical GDDR bus. That is why a 256-bit or 384-bit GDDR7 memory subsystem maintains rock-solid 1% low frame pacing at 4K where narrower buses suffer sudden 15ms–22ms frame-time spikes during rapid 180-degree camera turns. Check how your specific GPU tier scales across 1080p, 1440p, and 4K in our PC Game Requirements Checker.